| To: | "Ralf Baechle" <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: [PATCH]: load_mmu for SMP systems |
| From: | "Kip Walker" <kwalker@broadcom.com> |
| Date: | Mon, 28 Apr 2003 07:43:19 -0700 |
| Cc: | linux-mips@linux-mips.org |
| Organization: | Broadcom Corp. BPBU |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <3EA97D54.6910D49E@broadcom.com> <20030428025639.A20753@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
Ralf Baechle wrote: > > > TLB flush routines that have loops running up to tlbsize will lose if > > it's not set properly on all CPUs! > > Yeah, they're going to be sort of slow. There must be a reason for all > those GHz processors ;-) Um, it was worse than that if (for example) a complete TLB flush has a "for (i=0; i<0; i++)" loop around it. My board was experiencing occasional userland segfaults thanks to bogus TLB flushing. Kip |
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