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Re: Au1500 PCI autoconfig issues with multiple PCI devices?

To: Pete Popov <ppopov@mvista.com>
Subject: Re: Au1500 PCI autoconfig issues with multiple PCI devices?
From: Jun Sun <jsun@mvista.com>
Date: Thu, 24 Apr 2003 18:58:29 -0700
Cc: baitisj@evolution.com, Linux MIPS mailing list <linux-mips@linux-mips.org>, jsun@mvista.com
In-reply-to: <1051235666.29988.20.camel@adsl.pacbell.net>; from ppopov@mvista.com on Thu, Apr 24, 2003 at 06:54:26PM -0700
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On Thu, Apr 24, 2003 at 06:54:26PM -0700, Pete Popov wrote:
> On Thu, 2003-04-24 at 18:48, Jun Sun wrote:
> > On Thu, Apr 24, 2003 at 01:12:11PM -0700, Pete Popov wrote:
> > > 
> > > > Here's another question:
> > > 
> > > > What are the goals of the AU1500 PCI auto config? Is it supposed to be 
> > > > a full
> > > > implementation, or just enough to work with a PCI card? The reason I 
> > > > ask is
> > > > that the DBAu1500 has only one PCI slot, so a simple implementation 
> > > > would
> > > > normally suffice.
> > > > 
> > > > Restated: I don't know if the PCI auto config code was designed to work 
> > > > with
> > > > all sorts of wacky PCI devices. I don't know if the intention of the 
> > > > code is to
> > > > support the single PCI slot present on the DbAu1500 development board, 
> > > > or if it
> > > > is supposed to be more flexible (and complicated). 
> > > 
> > > The MIPS pci auto should work fine with a single PCI bus and it _should_
> > > be a full implementation. The code was ported from PPC some time ago,
> > > but sub busses were not tested.  
> > 
> > That is not true.  pciauto has been working P2P bridges pretty much since 
> > day one.
> > 
> > Usually sub-bus not working is due to type 1 configuration not supported
> > in pci ops, which is board-dependent code.
> > 
> > I took a brief look of au1x00 pci_ops and it appears it does not support 
> > type
> > 1 configuration access.  See arch/mips/ddb5xxx/ddb5477/pci_ops.c for one
> > example on how type 1 configuration being supported.
> 
> There is support for type 1 accesses in
> arch/mips/au1000/common/pci_ops.c.  Maybe you were looking at the pb1000
> pci routine which had limited pci bus support in an fpga. 

Ahh, yes.  That is the first config access routine I saw in the file and 
thus draw the conclusion. :)

Jun

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