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Re: MIPS32 cache functions now using c-r4k?

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: MIPS32 cache functions now using c-r4k?
From: Hartvig Ekner <hartvig@ekner.info>
Date: Wed, 16 Apr 2003 19:51:35 +0200
Cc: Linux MIPS mailing list <linux-mips@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <3E9D0C34.38FE2749@ekner.info> <20030416165919.A15111@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
Hi Ralf,

I'll test it out a little later this evening. But I think there is a typo and 
this patch should
be applied:

Index: pg-r4k.S
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/pg-r4k.S,v
retrieving revision 1.2.2.4
diff -u -r1.2.2.4 pg-r4k.S
--- pg-r4k.S    16 Apr 2003 17:00:23 -0000      1.2.2.4
+++ pg-r4k.S    16 Apr 2003 17:46:36 -0000
@@ -63,7 +63,7 @@
        sw      zero, 4(a0)
        sw      zero, 8(a0)
        sw      zero, 12(a0)
-       addiu   a0, 64
+       addiu   a0, 32
        sw      zero, -16(a0)
        sw      zero, -12(a0)
        sw      zero, -8(a0)

/Hartvig


Ralf Baechle wrote:

> On Wed, Apr 16, 2003 at 09:54:28AM +0200, Hartvig Ekner wrote:
>
> > It seems much of the r4k cache code assumes the presence of SD - which
> > breaks on all MIPS32 CPU's?
>
> Nothing a soldering iron and some patience couldn't fix ;)
>
> Try below patch,
>
>   Ralf


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