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Re: End c-tx49.c's misserable existence

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: End c-tx49.c's misserable existence
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Date: Mon, 14 Apr 2003 14:47:25 +0200 (MET DST)
Cc: ralf@linux-mips.org, nemoto@toshiba-tops.co.jp, linux-mips@linux-mips.org
In-reply-to: <20030414.152903.41628304.nemoto@toshiba-tops.co.jp>
Organization: Technical University of Gdansk
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
On Mon, 14 Apr 2003, Atsushi Nemoto wrote:

> One more request.  Please enclose R4600_V1_HIT_CACHEOP_WAR and
> R4600_V2_HIT_CACHEOP_WAR with appropriate CONFIG_CPU_XXX.  I do not
> know what CPUs need this workaround... (at least TX49 does not need
> this)

 Obviously R4600 CPUs only. ;-)

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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