Re: End c-tx49.c's misserable existence

[Atsushi Nemoto <anemo@mba.ocn.ne.jp>]

>>>>> On Mon, 14 Apr 2003 05:50:38 +0200, Ralf Baechle <ralf@linux-mips.org> 
>>>>> said:
ralf> Excellent.  This should provide a good performance boost for the
ralf> TX49 also as disabling the I-cache during the flush made the
ralf> operation even slower than it has to be.

Thank you for quick response.

One more request.  Please enclose R4600_V1_HIT_CACHEOP_WAR and
R4600_V2_HIT_CACHEOP_WAR with appropriate CONFIG_CPU_XXX.  I do not
know what CPUs need this workaround... (at least TX49 does not need
this)

---
Atsushi Nemoto