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End c-tx49.c's misserable existence

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: End c-tx49.c's misserable existence
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Mon, 14 Apr 2003 12:35:14 +0900 (JST)
Cc: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
In-reply-to: <20030412163215Z8225197-1272+1264@linux-mips.org>
Organization: TOSHIBA Personal Computer System Corporation
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20030412163215Z8225197-1272+1264@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Sat, 12 Apr 2003 17:32:09 +0100, ralf@linux-mips.org said:
ralf> Modified files:
ralf>   include/asm-mips: Tag: linux_2_4 war.h 
ralf>   include/asm-mips64: Tag: linux_2_4 war.h 
ralf>   arch/mips/mm   : Tag: linux_2_4 Makefile c-r4k.c 
ralf>   arch/mips64/mm : Tag: linux_2_4 c-r4k.c 
ralf> Removed files:
ralf>   arch/mips/mm   : Tag: linux_2_4 c-tx49.c 

ralf> Log message:
ralf>   End c-tx49.c's misserable existence and move it into c-r4k.c.

I'm happy to see this change and have one more request.

TOSHIBA_ICACHE_WAR can be removed.  This workaround is not needed
if kernel does not modify the cache codes itself in run-time.

When I wrote c-tx49.c I blindly followed the statement in TX49/H2
manual's statement. ("If the instruction (i.e. CACHE) is issued for
the line which this instruction itself exists, the following operation
is not guaranteed.")  Now I know this warning is only for
self-modified code.  There must be no problem if the codes is not
modified in run-time.  So please remove all TOSHIBA_ICACHE_WAR stuff
and make c-r4k.c more clean.

Thank you.
---
Atsushi Nemoto
The old PGP key (ID B6D728B1) has been revoked.  New key ID is 2874D52F.

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