Re: [PATCH 2.4] trivial secondary cache probe fix for R5000/NEVADA

[Ralf Baechle <ralf@linux-mips.org>]

On Sun, Apr 13, 2003 at 08:41:47PM +0200, Brian Murphy wrote:

> despite the comment there are at least two more processors this 
> probe is needed/works for.

I don't think we want to use this frightening jewel for more than necessary.
On the R5000 the secondary cache can nicely be probed by looking at the
c0_config register.  c0_config.sc=0 indicates a second level cache is
present, setting the se bit in the same register enables it and the two
ss bits contain the size - doesn't that sound so much nicer than the
insane fragile stunt necessary for the R4000?

  Ralf