I have no idea whether what I did was correct, but at least it is no less
incorrect than the code currently
in there, which coredumps now for some reason (I wonder why it never crashed
before). The test-bit macro
expects a bit-number, and not a mask which it is given in the current code.
So while fixing this, I also used the normal cpu_data macro for the
cpu_has_watch() macro, instead of
looking at CPU(0).
RCS file: /home/cvs/linux/include/asm-mips/processor.h,v
retrieving revision 188.8.131.52
diff -u -r184.108.40.206 processor.h
--- processor.h 7 Apr 2003 02:21:05 -0000 220.127.116.11
+++ processor.h 7 Apr 2003 13:03:07 -0000
@@ -66,14 +66,9 @@
struct cache_desc tcache; /* Tertiary/split secondary cache */
- * Assumption: Options of CPU 0 are a superset of all processors.
- * This is true for all known MIPS systems.
-#define cpu_has_watch (test_bit(MIPS_CPU_WATCH, cpu_data.options))
extern struct cpuinfo_mips cpu_data;
-#define current_cpu_data cpu_data[smp_processor_id()]
+#define current_cpu_data cpu_data[smp_processor_id()]
+#define cpu_has_watch (current_cpu_data.options & MIPS_CPU_WATCH)
* System setup and hardware flags..