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Re: Patch to disable PCI coherency on AU1500 platforms

To: Hartvig Ekner <hartvig@ekner.info>
Subject: Re: Patch to disable PCI coherency on AU1500 platforms
From: Pete Popov <ppopov@mvista.com>
Date: 01 Apr 2003 10:30:43 -0800
Cc: Linux MIPS mailing list <linux-mips@linux-mips.org>
In-reply-to: <3E898652.2717AEF2@ekner.info>
Organization: MontaVista Software
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <3E898652.2717AEF2@ekner.info>
Sender: linux-mips-bounce@linux-mips.org
I have a Pb1500 but like I said, I won't be able to get to it until end
of the month. I would really like to run some stress tests before
applying such core patches.  Can you wait until I get back?

Pete

On Tue, 2003-04-01 at 04:30, Hartvig Ekner wrote:
> The patch below sets the NC bit in the PCI_CFG register to disable HW 
> coherency when
> running non-coherent. Until now, this bit was cleared which means corruption 
> when using PCI
> DMA masters, even if the kernel was correctly compiled with 
> CONFIG_NONCOHERENT_IO.
> 
> Pb1500 specific notes: I don't have a PB1500, so I cannot test if it works 
> there. Note: I also
> removed what I think was an extraneous write to the PCI_CMEM register, so if 
> somebody
> could test this on a PB1500 it would be great.
> 
> /Hartvig
> 
> 
> 
> ______________________________________________________________________
> 
> Index: db1x00/setup.c
> ===================================================================
> RCS file: /home/cvs/linux/arch/mips/au1000/db1x00/Attic/setup.c,v
> retrieving revision 1.1.2.4
> diff -u -r1.1.2.4 setup.c
> --- db1x00/setup.c    21 Mar 2003 19:00:46 -0000      1.1.2.4
> +++ db1x00/setup.c    1 Apr 2003 12:14:54 -0000
> @@ -78,9 +78,8 @@
>  void __init au1x00_setup(void)
>  {
>       char *argptr;
> -     u32 pin_func, static_cfg0;
> -     u32 sys_freqctrl, sys_clksrc;
> -     u32 prid = read_c0_prid();
> +     u32 pin_func;
> +//   u32 prid = read_c0_prid();
>  
>       argptr = prom_getcmdline();
>  
> @@ -187,6 +186,19 @@
>  
>  #ifdef CONFIG_BLK_DEV_IDE
>       ide_ops = &std_ide_ops;
> +#endif
> +
> +#ifdef CONFIG_PCI
> +     /* Although YAMON has setup the PCI controller, some things
> +        may need to change. Eventually, all the PCI initialization
> +        should be done here (as in eg. ../pb1500/setup.c)
> +     */
> +
> +#ifdef CONFIG_NONCOHERENT_IO
> +     /* Must disable PCI coherency if running non-coherent */
> +
> +     au_writel(au_readl(Au1500_PCI_CFG) | (1<<16), Au1500_PCI_CFG);
> +#endif
>  #endif
>  
>  #if 0
> Index: pb1500/setup.c
> ===================================================================
> RCS file: /home/cvs/linux/arch/mips/au1000/pb1500/setup.c,v
> retrieving revision 1.1.2.12
> diff -u -r1.1.2.12 setup.c
> --- pb1500/setup.c    21 Mar 2003 19:00:47 -0000      1.1.2.12
> +++ pb1500/setup.c    1 Apr 2003 12:14:54 -0000
> @@ -35,6 +35,7 @@
>  #include <linux/console.h>
>  #include <linux/mc146818rtc.h>
>  #include <linux/delay.h>
> +#include <linux/proc_fs.h>
>  
>  #include <asm/cpu.h>
>  #include <asm/bootinfo.h>
> @@ -90,6 +91,7 @@
>       char *argptr;
>       u32 pin_func, static_cfg0;
>       u32 sys_freqctrl, sys_clksrc;
> +     u32 pcicfg;
>  
>       argptr = prom_getcmdline();
>  
> @@ -232,15 +234,25 @@
>  
>  #ifdef CONFIG_PCI
>       // Setup PCI bus controller
> -     au_writel(0, Au1500_PCI_CMEM);
> -     au_writel(0x00003fff, Au1500_CFG_BASE);
> +
> +     au_writel(0x00003fff, Au1500_PCI_CMEM);
> +
>  #if defined(__MIPSEB__)
> -     au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
> +     pcicfg = 0xf | (2<<6) | (1<<4);
>  #else
> -     au_writel(0xf, Au1500_PCI_CFG);
> +     pcicfg = 0xf;
>  #endif
> +
> +#ifdef CONFIG_NONCOHERENT_IO
> +     /* Must disable PCI coherency if running non-coherent */
> +
> +     pcicfg |= (1<<16);
> +#endif
> +
> +     au_writel(pcicfg,     Au1500_PCI_CFG);
> +
>       au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
> -     au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
> +     au_writel(0,          Au1500_PCI_MWBASE_REV_CCL);
>       au_writel(0x02a00356, Au1500_PCI_STATCMD);
>       au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
>       au_writel(0x00000008, Au1500_PCI_MBAR);


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