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Re: [PATCH]: c-r4k.c 4/7 flush_cache_mm cleanup

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH]: c-r4k.c 4/7 flush_cache_mm cleanup
From: Juan Quintela <quintela@mandrakesoft.com>
Date: Fri, 28 Mar 2003 20:33:22 +0100
Cc: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>, mipslist <linux-mips@linux-mips.org>
In-reply-to: <20030328195953.A17890@linux-mips.org> (Ralf Baechle's message of "Fri, 28 Mar 2003 19:59:53 +0100")
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>>>>> "ralf" == Ralf Baechle <ralf@linux-mips.org> writes:

ralf> On Fri, Mar 28, 2003 at 06:51:57PM +0100, Maciej W. Rozycki wrote:
>> >    flush_cache_mm can use __flush_cache_all.
>> 
>> Wrong, it should use r4k_flush_pcache_all() unconditionally, but I'm told
>> such a setup triggers a bug somewhere, that needs to be tracked down
>> before committing that change to the CVS.

ralf> Now that the problem is mentioned on the list lemme elaborate a bit.  The
ralf> problem mentioned only affects R4000SC and R4400SC processors.
ralf> Flush_cache_mm is only used when a mm is either copied on fork or when
ralf> it's finally destroyed.  Because the S-cache is is physically indexed
ralf> and the P-cache is refilled from the S-cache if data should be still in
ralf> there we don't need to flush the S-cache ever for any of the mm's
ralf> cacheflushing functions.  So the observation that things are only
ralf> working properly if we do flush the S-cache also suggest we're either
ralf> having a bug elsewhere in the cache code or we're hitting a hardware
ralf> problem.

Ok, will took a look at that (casually my I2 has an R4400SC), but I
still think that patch can be applied.  It has the same behaviour than
actual code.  And it is a cleanup.  When we found the bug, we can do a
s/__flush_cache_all/r4k_flush_pcache_all/

on that function.

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

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