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[PATCH]: Same cp0 regs are 64bits and other 32bit

To: Ralf Baechle <ralf@linux-mips.org>, mipslist <linux-mips@linux-mips.org>
Subject: [PATCH]: Same cp0 regs are 64bits and other 32bit
From: Juan Quintela <quintela@mandrakesoft.com>
Date: Thu, 27 Mar 2003 03:53:07 +0100
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Hi

*some* cp0 regs are unsigned long, not unsigned int.

Later, Juan.


 build/arch/mips/kernel/traps.c |    7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)

diff -puN build/arch/mips/kernel/traps.c~cp0_regs_are_unsigned_long 
build/arch/mips/kernel/traps.c
--- 24/build/arch/mips/kernel/traps.c~cp0_regs_are_unsigned_long        
2003-03-25 22:35:22.000000000 +0100
+++ 24-quintela/build/arch/mips/kernel/traps.c  2003-03-25 22:36:59.000000000 
+0100
@@ -788,9 +788,8 @@ asmlinkage void cache_parity_error(void)
        unsigned int reg_val;
 
        /* For the moment, report the problem and hang. */
-       reg_val = read_c0_errorepc();
        printk("Cache error exception:\n");
-       printk("cp0_errorepc == %08x\n", read_c0_errorepc());
+       printk("cp0_errorepc == %08lx\n", read_c0_errorepc());
        reg_val = read_c0_cacheerr();
        printk("c0_cacheerr == %08x\n", reg_val);
 
@@ -809,10 +808,10 @@ asmlinkage void cache_parity_error(void)
 
 #if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
        if (reg_val & (1<<22))
-               printk("DErrAddr0: 0x%08x\n", read_c0_derraddr0());
+               printk("DErrAddr0: 0x%08lx\n", read_c0_derraddr0());
 
        if (reg_val & (1<<23))
-               printk("DErrAddr1: 0x%08x\n", read_c0_derraddr1());
+               printk("DErrAddr1: 0x%08lx\n", read_c0_derraddr1());
 #endif
 
        panic("Can't handle the cache error!");

_


-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

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