Patches for Au1000: PCI int problem, DB1500 board reset & ethernet

[Hartvig Ekner <hartvig@ekner.info>]

Hi,

The first patch below fixes interrupt setup for DB1500. The PCI interrupts were 
polarized wrongly, causing a deadlock when used.
The second patch adds board reset using HW register for DB1500.
The third patch reverses interrupt handling order for RX & TX to minimize 
packet loss in high-load situations.

/Hartvig


Index: irq.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/au1000/common/irq.c,v
retrieving revision 1.11.2.14
diff -u -r1.11.2.14 irq.c
--- irq.c       26 Feb 2003 21:14:24 -0000      1.11.2.14
+++ irq.c       13 Mar 2003 19:45:57 -0000
@@ -430,14 +430,10 @@
                        case AU1000_IRDA_RX_INT:
 
                        case AU1000_MAC0_DMA_INT:
-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_DB1000) || 
defined(CONFIG_MIPS_DB1500)
-                       case AU1000_MAC1_DMA_INT:
-#endif
-#ifdef CONFIG_MIPS_PB1500
+#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_DB1000) || 
defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
                        case AU1000_MAC1_DMA_INT:
 #endif
                        case AU1500_GPIO_204:
-
                                setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
                                irq_desc[i].handler = &level_irq_type;
                                break;
@@ -446,7 +442,7 @@
                        case AU1000_GPIO_15:
 #endif
                        case AU1000_USB_HOST_INT:
-#ifdef CONFIG_MIPS_PB1500
+#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
                        case AU1000_PCI_INTA:
                        case AU1000_PCI_INTB:
                        case AU1000_PCI_INTC:
@@ -488,9 +484,9 @@
                        case AU1000_RTC_MATCH0_INT:
                        case AU1000_RTC_MATCH1_INT:
                        case AU1000_RTC_MATCH2_INT:
-                               setup_local_irq(i, INTC_INT_RISE_EDGE, 0);
-                                irq_desc[i].handler = &rise_edge_irq_type;
-                                break;
+                               setup_local_irq(i, INTC_INT_RISE_EDGE, 0);
+                               irq_desc[i].handler = &rise_edge_irq_type;
+                               break;
 
                                 // Careful if you change match 2 request!
                                 // The interrupt handler is called directly

Index: reset.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/au1000/common/reset.c,v
retrieving revision 1.2.2.8
diff -u -r1.2.2.8 reset.c
--- reset.c     11 Dec 2002 06:12:29 -0000      1.2.2.8
+++ reset.c     13 Mar 2003 19:46:03 -0000
@@ -111,15 +111,13 @@
        set_c0_config(CONF_CM_UNCACHED);
        flush_cache_all();
        write_c0_wired(0);
- 
-#ifdef CONFIG_MIPS_PB1500
-       au_writel(0x00000000, 0xAE00001C);
-#endif
 
-#ifdef CONFIG_MIPS_PB1100
+#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) || 
defined(CONFIG_MIPS_DB1500)
+       /* Do a HW reset if the board can do it */
+
        au_writel(0x00000000, 0xAE00001C);
 #endif
- 
+
        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
 }
 

Index: au1000_eth.c
===================================================================
RCS file: /home/cvs/linux/drivers/net/au1000_eth.c,v
retrieving revision 1.5.2.15
diff -u -r1.5.2.15 au1000_eth.c
--- au1000_eth.c        3 Mar 2003 06:40:30 -0000       1.5.2.15
+++ au1000_eth.c        13 Mar 2003 20:01:51 -0000
@@ -1414,8 +1414,11 @@
                printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
                return;
        }
-       au1000_tx_ack(dev);
+
+       /* Handle RX interrupts first to minimize chance of overrun */
+
        au1000_rx(dev);
+       au1000_tx_ack(dev);
 }