| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: Disabling lwl and lwr instruction generation |
| From: | Richard Hodges <rh@matriplex.com> |
| Date: | Wed, 12 Mar 2003 16:50:53 -0800 (PST) |
| Cc: | Ranjan Parthasarathy <ranjanp@efi.com>, "'linux-mips@linux-mips.org'" <linux-mips@linux-mips.org> |
| In-reply-to: | <20030313014338.C29568@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <D9F6B9DABA4CAE4B92850252C52383AB0796823C@ex-eng-corp.efi.com> <20030313014338.C29568@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Thu, 13 Mar 2003, Ralf Baechle wrote: > On Wed, Mar 12, 2003 at 10:05:20AM -0800, Ranjan Parthasarathy wrote: > > > Is there a way to tell gcc to not generate the lwl, lwr instructions? > > Gcc will only ever generate these instructions when __attribute__((unaligned)) > is used. I got lwl and lwr from a memcpy() with two void pointers... I quickly changed those to the (aligned) structure pointers instead, and then memcpy() changed to ordinary word loads and stores. So, is somebody starting a toolchain for that new Chinese CPU? :-) -Richard |
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