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wired tlb entries and global bit..

To: linux-mips@linux-mips.org
Subject: wired tlb entries and global bit..
From: "Ashish anand" <ashish.anand@inspiretech.com>
Date: Fri, 21 Feb 2003 17:19:45 +0530
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
A small question..

1.my understanding of wired tlb entries mean set of address translations
that i always want to be present throughout the system is on ,
irrespective of asid's/tlb flush , examplesake pci io/mem window ...is
this right?

2.can i acheive the same by using the global bit from entrylo0 and
entrylo1.

Best Regards,
Ashish Anand



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