Here is a complete patch for both mips/mips64, 2.4 and
2.5. Of course only 2.4/mips combo is tested.
The clear_bit/set_bit actually need to be protected.
The flag setting needs to be in sync with the actual
hardware setting (set_entry_hi/set current pgd). Otherwise
an tlb flushing IPI may does the wrong thing.
Jun
On Wed, Jan 29, 2003 at 09:06:27AM +0100, Ralf Baechle wrote:
> On Mon, Jan 27, 2003 at 05:03:46PM -0800, Jun Sun wrote:
>
> > I also find a stupid typo and a subtle hole in my original patch.
> > Here is an updated version, for 2.4/mips only. If it looks ok, I
> > will extend to other sub-arches/trees.
> >
> > This new one is pretty nice in that all mmu related operations
> > are put into one file and it is much easier to ensure correctness
> > later.
>
> I like this one.
>
> > +
> > + /*
> > + * Mark current->active_mm as not "active" anymore.
> > + * We don't want to mislead possible IPI tlb flush routines.
> > + */
> > + clear_bit(cpu, &prev->cpu_vm_mask);
> > + set_bit(cpu, &next->cpu_vm_mask);
> > +
> > + local_irq_restore(flags);
>
> I don't think it's necessary to protect the clear_bit and set_bit operations
> with local_irq_save ... local_irq_restore.
>
> In addition because switch_mm is always called with interrupts enabled you
> can simplify that to local_irq_disable ... local_irq_enable.
>
> Ralf
>
030204-2.4-smp-tlb-flush.patch
Description: Text document
030204-2.5-smp-tlb-flush.patch
Description: Text document
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