| To: | "'linux-mips@linux-mips.org'" <linux-mips@linux-mips.org> |
|---|---|
| Subject: | A question on Linux SMP and cache coherency |
| From: | Adam Kiepul <Adam_Kiepul@pmc-sierra.com> |
| Date: | Thu, 23 Jan 2003 15:17:25 -0800 |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Sender: | linux-mips-bounce@linux-mips.org |
Hi, I would really appreciate if anyone could tell me whether Hardware-maintained cache coherency between processors is required for Linux SMP operation. Thank you very much, Adam Kiepul |
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