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Re: [patch] R4k cache code synchronization

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: [patch] R4k cache code synchronization
From: Juan Quintela <quintela@mandrakesoft.com>
Date: 10 Jan 2003 14:33:51 +0100
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <Pine.GSO.3.96.1030110131859.23678B-100000@delta.ds2.pg.gda.pl>
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I agree with the cleanup.

The only thing that could be controversial is the _l1() thing, and as
current thing is broken, I vote for insclusion.

maciej> diff -up --recursive --new-file 
linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c 
linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c
maciej> --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c        
2002-12-20 03:56:52.000000000 +0000
maciej> +++ linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c      
2003-01-09 23:21:39.000000000 +0000
@@ -979,7 +980,7 @@ static void r4k_dma_cache_wback_inv_sc(u
        unsigned long end, a;
 
        if (size >= scache_size) {
-               flush_cache_l1();
+               flush_cache_all();
                return;
        }

This one is fixing a bug, we are talking about a chip with Secondary
cache and don't touch the secondary cache at all :(

Later, Juan. 

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

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