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Re: possible Malta 4Kc cache problem ...

To: "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: possible Malta 4Kc cache problem ...
From: Jun Sun <jsun@mvista.com>
Date: Wed, 4 Dec 2002 13:59:50 -0800
Cc: linux-mips@linux-mips.org, jsun@mvista.com
In-reply-to: <007501c29b78$f34680e0$10eca8c0@grendel>; from kevink@mips.com on Wed, Dec 04, 2002 at 10:38:36AM +0100
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20021203224504.B13437@mvista.com> <007501c29b78$f34680e0$10eca8c0@grendel>
Sender: linux-mips-bounce@linux-mips.org
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On Wed, Dec 04, 2002 at 10:38:36AM +0100, Kevin D. Kissell wrote:
> 
> Which version of the 4Kc manual are you looking at?  I'm looking
> at a very recent version of the 4Kc Software User's Manual
> (version 1.17, dated September 25, 2002), and it only shows
> Hit_Writeback_D to be invalid for *secondary and teritary*
> caches, which makes sense, since the 4KSc doesn't have any.
>

I was looking at rev 1.12, Jan 3, 2001.

Good to know that 4K family does have Hit_WRiteback_D.  However,
since it is "recommanded" instead of "required".  Shouldn't we
still use "Hit_Writeback_Inv_D" just to be on the safe side?

Jun

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