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Re: possible Malta 4Kc cache problem ...

To: <linux-mips@linux-mips.org>
Subject: Re: possible Malta 4Kc cache problem ...
From: "Kevin D. Kissell" <kevink@mips.com>
Date: Wed, 4 Dec 2002 10:46:21 +0100
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20021203224504.B13437@mvista.com> <007501c29b78$f34680e0$10eca8c0@grendel>
Sender: linux-mips-bounce@linux-mips.org
> Which version of the 4Kc manual are you looking at?  I'm looking
> at a very recent version of the 4Kc Software User's Manual
> (version 1.17, dated September 25, 2002), and it only shows
> Hit_Writeback_D to be invalid for *secondary and teritary*
> caches, which makes sense, since the 4KSc doesn't have any.

Note for the pendantic - that "S" was a typo, though of
course the lack of secondary and tertiary caches applies
to the whole 4K family, c, Ec, Sc, and Sd.

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