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Re: Once again: test_and_set for CPUs w/o LL/SC

To: linux-mips@linux-mips.org
Subject: Re: Once again: test_and_set for CPUs w/o LL/SC
From: Johannes Stezenbach <js@convergence.de>
Date: Mon, 7 Oct 2002 16:47:49 +0200
In-reply-to: <20020916164034.GA12489@convergence.de>
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References: <20020916164034.GA12489@convergence.de>
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Hi all,

On Mon, Sep 16, 2002 at 06:40:34PM +0200, I wrote:
> 
> The NEC VR41xx CPU has no LL/SC instructions, so they must
> be emulated by the kernel, which slows down the test-and-set
> and compare-and-swap operations (used by linux-threads)
> considerably. For the VR41xx (and other CPUs which have
> branch-likely instructions), there exisits a workaround
> which enables userspace-only atomic operations, with minor
> help from the kernel: The kernel must guarantee that register
> k1 is not equal to some magic value after every transition
> to userspace.
> 
> Two things were left open in July:
> - find out the minimal amount of changes to the kernel
>   to guarantee k1 != MAGIC after eret
> - determine how to tell glibc to use the branch-likely
>   workaround instead of emulated LL/SC

Since there have been no follow-ups I must assume that
this topic is no longer of interest. Is this so? Or
is the way I approach it deemed inappropriate?


Regards,
Johannes

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