| To: | "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> |
|---|---|
| Subject: | Re: Promblem with PREF (prefetching) in memcpy |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Fri, 4 Oct 2002 15:17:18 +0200 |
| Cc: | Alan Cox <alan@lxorguk.ukuu.org.uk>, Carsten Langgaard <carstenl@mips.com>, Dominic Sweetman <dom@algor.co.uk>, linux-mips@linux-mips.org |
| In-reply-to: | <Pine.GSO.3.96.1021004145625.6208C-100000@delta.ds2.pg.gda.pl>; from macro@ds2.pg.gda.pl on Fri, Oct 04, 2002 at 03:01:17PM +0200 |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1033734968.31839.5.camel@irongate.swansea.linux.org.uk> <Pine.GSO.3.96.1021004145625.6208C-100000@delta.ds2.pg.gda.pl> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.2.5.1i |
On Fri, Oct 04, 2002 at 03:01:17PM +0200, Maciej W. Rozycki wrote: > > > Is a bus error exception an address related exception ? > > > I'm afraid some implementation think it's not. > > > > So you need an option for broken systems, no new news 8) > > For MIPS a bus error exception is not an address related exception by > definition (not surprising, anyway). Specifically, the BadVaddr register > is not set upon one. A particular pain is the exception can be delayed almost arbitrarily due to posted writes. So quite frequently there is no easy association between the machine state at exception time and the cause ... Ralf |
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