On Wed, Sep 04, 2002 at 10:53:55AM +0100, Dominic Sweetman wrote:
> > Okay... I think I've got a problem that isn't covered by the usual
> > examples.
> Possibly this is too simple an answer and is stuff you know quite well
Yeah, it is. See my response to Maciej's posting....
> > Which, as you can see, attempts to access address 0xfc00000c.
> But that address is in the MIPS CPU's 'kseg2' region. Addresses there
> are always translated by the TLB, and you haven't got an entry.
It's also the physical address.
And this is the heart of the problem. I set up an ioremap, so I thought
that the TLB exception handler would fix this for me. It looks like that
code won't do anything if the exception was generated from an interrupt...
Or am I reading it wrong? I'm not an expert on the TLB code...
> You could read the book ("See MIPS Run")...
I read it quite some time ago. My copy got very dog-eared before I had the
majority of the information committed to memory. Nice book, BTW.
Matthew Dharm Work: email@example.com
Senior Software Designer, Momentum Computer