> Okay... I think I've got a problem that isn't covered by the usual
Possibly this is too simple an answer and is stuff you know quite well
> Which, as you can see, attempts to access address 0xfc00000c.
But that address is in the MIPS CPU's 'kseg2' region. Addresses there
are always translated by the TLB, and you haven't got an entry.
Registers from things like the 2nd level interrupt controller are
memory mapped I/O locations, and you need to do an uncached access to
the appropriate physical address.
Most MIPS hardware has registers mapped between 0-512Mbyte
(0-0x1fff.ffff) physical, because a MIPS CPU can do uncached accesses
to that using the 'kseg1' window, which occupies the
0xa000.0000-0xbfff.ffff (CPU virtual address)
0x0000.0000-0x1fff.ffff (physical address).
There are macros defined for translating a physical address into a
kseg1 address (just add 0xa000.0000, really).
You could read the book ("See MIPS Run")...
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