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RE: Mips cross toolchain

To: Lyle Bainbridge <lyle@zevion.com>
Subject: RE: Mips cross toolchain
From: Pete Popov <ppopov@mvista.com>
Date: 20 Aug 2002 12:04:06 -0700
Cc: Joe George <joeg@clearcore.net>, linux-mips <linux-mips@oss.sgi.com>
In-reply-to: <NCBBKGDBOEEBDOELAFOFAEGKCPAA.lyle@zevion.com>
References: <NCBBKGDBOEEBDOELAFOFAEGKCPAA.lyle@zevion.com>
Sender: owner-linux-mips@oss.sgi.com
On Tue, 2002-08-20 at 11:47, Lyle Bainbridge wrote:
> 
> 
> -----Original Message-----
> From: Joe George [mailto:joeg@clearcore.net]
> Sent: Tuesday, August 20, 2002 11:29 AM
> To: Lyle Bainbridge
> Cc: linux-mips@oss.sgi.com
> Subject: Re: Mips cross toolchain
> 
> 
> >>I don't know of anyone using big endian with Alchemy at this point.
> >>There may be some and I'd like to hear from them.
> 
> 
> Firstly, thanks to everyone for the advice.
> 
> Ideally I'd use big endian.  Is there any reason the toolchain
> wouldn't support this.  

No.

> I'm only using the Au1500 on-chip peripherals
> with the addition of an external Highpoint HPT371 ATA controller.

Any of the PCI peripherals on the Pb1500 would require the 36 bit code
support.  I ... think I tested the PCI bus support using the 36 bit
patch and BE mode and it worked fine.  Looks like Joe is working on some
bug fixes though so the 36 bit code is not complete yet in oss.

Pete



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