| To: | "Zajerko-McKee, Nick" <nmckee@telogy.com> |
|---|---|
| Subject: | Re: GAS 4kc question... |
| From: | Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de> |
| Date: | Wed, 31 Jul 2002 01:08:09 +0200 |
| Cc: | "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com> |
| In-reply-to: | <37A3C2F21006D611995100B0D0F9B73CBFE213@tnint11.telogy.design.ti.com> |
| References: | <37A3C2F21006D611995100B0D0F9B73CBFE213@tnint11.telogy.design.ti.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
| User-agent: | Mutt/1.4i |
Zajerko-McKee, Nick wrote: > Hi, > > I'm trying to write some inline assembler code that needs the madd and mulu > op codes found on the 4KC processor. I've tried setting the cpu to 4650, > but it failed to recognize the mulu instruction. Can someone give me the > magic incantation? I'm running right now GCC 2.95.3 from Montavista. I > guess one way I can attack it for now is to build the op code by hand, but > that is quite dirty, IMHO... At least the assembler in current binutils does not know about "mulu" at all. I don't know if Montavista has added such a feature to their derivative. Thiemo |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: [patch] MIPS64 R4k TLB refill CP0 hazards, Ralf Baechle |
|---|---|
| Next by Date: | Re: GAS 4kc question..., Ralf Baechle |
| Previous by Thread: | GAS 4kc question..., Zajerko-McKee, Nick |
| Next by Thread: | Re: GAS 4kc question..., Ralf Baechle |
| Indexes: | [Date] [Thread] [Top] [All Lists] |