| To: | Carsten Langgaard <carstenl@mips.com> |
|---|---|
| Subject: | Re: LTP testing (shmat01) |
| From: | Ralf Baechle <ralf@oss.sgi.com> |
| Date: | Thu, 4 Jul 2002 21:56:14 +0200 |
| Cc: | linux-mips@oss.sgi.com |
| In-reply-to: | <3D249181.D9147AAE@mips.com>; from carstenl@mips.com on Thu, Jul 04, 2002 at 08:18:41PM +0200 |
| References: | <3D246924.542682B2@mips.com> <20020704193414.A29570@dea.linux-mips.net> <3D249181.D9147AAE@mips.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
| User-agent: | Mutt/1.2.5.1i |
On Thu, Jul 04, 2002 at 08:18:41PM +0200, Carsten Langgaard wrote: > > any power of 2 > PAGE_SIZE. > > Ok, I see, but is there any reason for us to be different than the > rest of the world ? Imho the your question already wrong :-) Any assumption about the constant's value in a piece of code is wrong. The reason why the constant's value was choosen are virtually indexed caches. The value allows attaching of shared memory segment without any cache flushes. Other architectures also use different values from PAGE_SIZE like IA64 1MB, SH 16kB and Sparc not even a constant value accross all architectures variants, so unlike what your posting implicates we're not that unusual. Ralf |
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