| To: | linux-mips@oss.sgi.com |
|---|---|
| Subject: | Re: Please disregard; was: [PATCH] arch/mips/kernel/irq_cpu.c interrupt safety? |
| From: | William Jhun <wjhun@ayrnetworks.com> |
| Date: | Thu, 23 May 2002 16:59:27 -0700 |
| In-reply-to: | <20020520184151.C26598@ayrnetworks.com>; from wjhun@ayrnetworks.com on Mon, May 20, 2002 at 06:41:51PM -0700 |
| References: | <20020520184151.C26598@ayrnetworks.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
| User-agent: | Mutt/1.2.5i |
Please disregard this, I jumped the gun on this one. These routines are
only ever called from arch/mips/kernel/irq.c, which always safely
calls these routines under the irq_desc's spinlock (or in the case of
ack(), do_IRQ() is already invoked with interrupts turned off).
I'll be sure to grep a little more carefully next time. ;o)
Will
On Mon, May 20, 2002 at 06:41:51PM -0700, William Jhun wrote:
> The mips_cpu_irq_*() routines in arch/mips/kernel/irq_cpu.c seem to not be
> safe; {clear,set}_cp0_*() don't provide interrupt safety while changing the
> cp0
> register. Is this not wrong? Is there a case where an interrupt handler may
> change CP0 status? If so, the patch below (against linux_2_4) simply disables
> interrupts during these operations.
>
> Thanks,
> Will
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