linux-mips
[Top] [All Lists]

Re: pci config cycles on VRC-5477

To: Geert Uytterhoeven <geert@linux-m68k.org>
Subject: Re: pci config cycles on VRC-5477
From: Gerald Champagne <gerald.champagne@esstech.com>
Date: Tue, 12 Mar 2002 11:26:54 -0600
Cc: Jun Sun <jsun@mvista.com>, Linux/MIPS Development <linux-mips@oss.sgi.com>
References: <Pine.GSO.4.21.0203121013530.23527-100000@vervain.sonytel.be>
Sender: owner-linux-mips@oss.sgi.com
User-agent: Mozilla/5.0 (Windows; U; Win 9x 4.90; en-US; rv:0.9.8) Gecko/20020204


Did I miss something, or is this a bug?

Your understanding is correct.  I think this is a bug.

Do you actually see the bug happening? So far it has never hit me, but maybe due to the drivers that are loaded on my configuration.


(IIRC) When I wrote the Vrc-5074 support, I thought about this as well.
But then I noticed that this was already done by the upper PCI layer. Is this
still true?

Gr{oetje,eeting}s,

                                                Geert

You're right.  It's not a problem.  The code that disables interrupts right
here in drivers/pci/pci.c:

#define PCI_OP(rw,size,type) \
int pci_##rw##_config_##size (struct pci_dev *dev, int pos, type value) \
{                                                                       \
        int res;                                                        \
        unsigned long flags;                                            \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
        spin_lock_irqsave(&pci_lock, flags);                            \
        res = dev->bus->ops->rw##_##size(dev, pos, value);              \
        spin_unlock_irqrestore(&pci_lock, flags);                       \
        return res;                                                     \
}

I don't know why I missed that...

Thanks for the reply!

Gerald



<Prev in Thread] Current Thread [Next in Thread>