linux-mips
[Top] [All Lists]

Re: Re: MIPS, i8259 and spurious interrupts.

To: Scott A McConnell <samcconn@cotw.com>
Subject: Re: Re: MIPS, i8259 and spurious interrupts.
From: Zhang Fuxin <fxzhang@ict.ac.cn>
Date: Tue, 26 Feb 2002 21:32:8 +0800
Cc: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Sender: owner-linux-mips@oss.sgi.com
hi,
 then check your interrupt mask code,i suffered from this problem
some time ago too. You can check the list for those threads(more than
one). In short,the reason i was seeing spurious interrupt is:
   1. the code i used to decide which interrupt coming in used to have a bug
      (the IRR bit may still set for current interrupt even after i masked it, 
       when a new 8259 interrupt come in,i detect it as the old one)
   2. write to 8259 didn't really reach device for some time,some barrier needed

>
>No this is an instrumentation mistake. Yes it never returns...
>Because I reenter the interrupt handler before it completes.

Regards
            Zhang Fuxin
            fxzhang@ict.ac.cn


<Prev in Thread] Current Thread [Next in Thread>