So, what's the proper usage for set_io_port_base()?
I'm trying to bring up Linux on our newest board (the Ocelot-G -- see
www.momenco.com for more information). I think I'm pretty far along,
but I can't get a plug-in PCI ethernet device to work. What I get is:
eepro100.c:v1.09j-t 9/29/99 Donald Becker
eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V.
Savochkin <email@example.com> and others
PCI setting cache line size to 8 from 0
eth0: Invalid EEPROM checksum 0x0000, check settings before activating
eth0: Intel Corp. 82559ER, 00:00:00:00:00:00, IRQ 9.
Receiver lock-up bug exists -- enabling work-around.
Board assembly 000000-000, Physical connectors present:
Primary interface chip None PHY #0.
General self-test: passed.
Serial sub-system self-test: passed.
Internal registers self-test: passed.
ROM checksum self-test: passed (0x1d68d8db).
Receiver lock-up workaround activated.
Now, I'm pretty sure this has something to do with the initcall to
set_io_port_base() and ioremap(), which are in my setup.c (copied from
linux/arch/mips/gt64120/momenco_ocelot/setup.c and modified). Without
that bit of code at the bottom of that function, I don't even get
this -- it just crashes. So I know I need this code, but I'm just not
certain what/how I should be using it...
My initial guess is that it's used to map some virtual address space
onto the physical addresses needed to actually generate PCI I/O
transactions, but that's just a guess. If that's right, then the code
I'm using _should_ work... I call ioremap() with the physical base and
size, and then set_io_port_base() using the result of ioremap().
Anyone have any thoughts?
Matthew D. Dharm Senior Software Designer
Momentum Computer Inc. 1815 Aston Ave. Suite 107
(760) 431-8663 X-115 Carlsbad, CA 92008-7310
Momentum Works For You www.momenco.com