| To: | Jun Sun <jsun@mvista.com> |
|---|---|
| Subject: | Re: FPU emulator unsafe for SMP? |
| From: | Ralf Baechle <ralf@oss.sgi.com> |
| Date: | Wed, 20 Feb 2002 14:09:17 +0100 |
| Cc: | "Kevin D. Kissell" <kevink@mips.com>, linux-mips@oss.sgi.com |
| In-reply-to: | <20020219171238.E25739@mvista.com>; from jsun@mvista.com on Tue, Feb 19, 2002 at 05:12:38PM -0800 |
| References: | <3C6C6ACF.CAD2FFC@mvista.com> <20020215031118.B21011@dea.linux-mips.net> <20020214232030.A3601@mvista.com> <20020215003037.A3670@mvista.com> <002b01c1b607$6afbd5c0$10eca8c0@grendel> <20020219140514.C25739@mvista.com> <00af01c1b9a2$c0d6d5f0$10eca8c0@grendel> <20020219171238.E25739@mvista.com> |
| Sender: | owner-linux-mips@oss.sgi.com |
| User-agent: | Mutt/1.2.5i |
On Tue, Feb 19, 2002 at 05:12:38PM -0800, Jun Sun wrote: > > It's gotta be done. I mean, the last I heard (which was a long > > time ago) mips64 Linux was keeping the CPU node number in > > a watchpoint register (or something equally unwholesome) > > It seems that people are getting smarter by putting cpu id to > context register. In fact isn't this part of new MIPS > standard? The context register is actually intended to be used for indexing a flat 4mb array of pagetables on a 32-bit processor. It's a bit ill-defined on R4000-class processors as it assumes a size of 8 bytes per pte, so cannot be used in the Linux/MIPS kernel without shifting bits around. Also in case of Linux it means entering the world of cache aliases ... Ralf |
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