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Re: Re: SNaN & QNaN on mips

To: "H . J . Lu" <hjl@lucon.org>
Subject: Re: Re: SNaN & QNaN on mips
From: Zhang Fuxin <fxzhang@ict.ac.cn>
Date: Mon, 4 Feb 2002 16:50:43 +0800
Cc: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Sender: owner-linux-mips@oss.sgi.com
在 2002-02-03 22:54:00 you wrote:
>On Mon, Feb 04, 2002 at 02:22:48PM +0800, Zhang Fuxin wrote:
>> hi,
>> 
>> Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and 
>> optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu
>> (maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both
>>  say so.And experiments confirm this.
>> 
>> Should we correct it?
>
>Yes. Do you have a patch?
Not currently but I will have a try. glibc seems having the same problem.

>
>Thanks.
>
>
>H.J.

Regards
            Zhang Fuxin
            fxzhang@ict.ac.cn


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