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Re: patches for test-and-set without ll/sc (Re: thread-ready ABIs)

To: "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: patches for test-and-set without ll/sc (Re: thread-ready ABIs)
From: Jason Gunthorpe <jgg@debian.org>
Date: Tue, 22 Jan 2002 11:08:15 -0700 (MST)
Cc: linux-mips@oss.sgi.com
In-reply-to: <005301c1a368$87d27ed0$10eca8c0@grendel>
Sender: owner-linux-mips@oss.sgi.com
On Tue, 22 Jan 2002, Kevin D. Kissell wrote:

> The idea leverages off the fact that a branch likely
> instruction performs a kind of conditional execution.
> The instruction in the delay slot is executed only if
> the branch is taken.  This can be used to synthesize
> a conditional store.  The user level code for a simple
> atomic increment, for example, would look something
> like this:

Hmm, could you use this to take the race out of the kernel wait loop 
too? Ie use current->need_resched as the test and 'wait' as the
conditional operation.

Jason


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