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Re: thread-ready ABIs

To: Ulrich Drepper <drepper@redhat.com>
Subject: Re: thread-ready ABIs
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Date: Fri, 18 Jan 2002 21:50:08 +0100 (MET)
Cc: "H . J . Lu" <hjl@lucon.org>, linux-mips@oss.sgi.com
In-reply-to: <m3vgdz2yxo.fsf@myware.mynet>
Organization: Technical University of Gdansk
Sender: owner-linux-mips@oss.sgi.com
On 18 Jan 2002, Ulrich Drepper wrote:

> > But what about that Alpha's special code?  It could possibly be
> > reused given the large Alpha's similarity to MIPS.
> 
> No.  Alpha has certain builtin code which looks similar to calls or
> software interrupts but are executed in the CPU.  This allows access

 Yep, PALcode is possibly the most significant difference.

> to some memory in the CPU which is almost as fast as a normal register
> access.  MIPS doesn't have such hardware.  If you cannot find a
> register you're doomed.

 Hmm, why would an ABI reserve spare registers for a possible future use
that might never happen?  We can probably define a new ABI specifically
for Linux, though, if the gain surpasses the loss. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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