linux-mips
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Re: thread-ready ABIs

To: "H . J . Lu" <hjl@lucon.org>
Subject: Re: thread-ready ABIs
From: Ulrich Drepper <drepper@redhat.com>
Date: 18 Jan 2002 10:31:17 -0800
Cc: GNU libc hacker <libc-hacker@sources.redhat.com>, linux-mips@oss.sgi.com
In-reply-to: <20020118101908.C23887@lucon.org>
References: <m3elkoa5dw.fsf@myware.mynet> <20020118101908.C23887@lucon.org>
Reply-to: drepper@redhat.com (Ulrich Drepper)
Sender: owner-linux-mips@oss.sgi.com
User-agent: Gnus/5.0808 (Gnus v5.8.8) XEmacs/21.5 (asparagus)
"H . J . Lu" <hjl@lucon.org> writes:

> I don't see there are any registers we can use without breaking ABI.
> On the other hand, can we change the mips kernel to save k0 or k1 for
> user space?

Are these registers which are readable by normal users but writable
only in ring 0?  If yes, this is definitely worthwhile (similar to how
x86 works).  The only problem will be the MIPS variants which don't
have this register.  I bet there are some.

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