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Re: calibrating MIPS counter frequency

To: Ralf Baechle <ralf@oss.sgi.com>
Subject: Re: calibrating MIPS counter frequency
From: Jun Sun <jsun@mvista.com>
Date: Thu, 29 Nov 2001 10:17:56 -0800
Cc: linux-mips@oss.sgi.com
References: <3C05646B.51BF79FB@mvista.com> <20011130020240.F638@dea.linux-mips.net>
Sender: owner-linux-mips@oss.sgi.com
Ralf Baechle wrote:
> 
> On Wed, Nov 28, 2001 at 02:25:47PM -0800, Jun Sun wrote:
> 
> > In the future, I think mips counter frequency really should go to mips_cpu
> > structure.  If we always know the counter frequency, either by board setup
> > routine or runtime calibration, we can get rid of the gettimeoffset
> > calibration routines.
> 
> Better stick with the calibration procedure.  The crystal oscilators used
> in most computer systems don't provide the high accuracy of frequency
> that is required to keep the clock accurately over long time. 

The drifting clock effect won't happen here because the base value (timerlo)is
reset at each jiffies change.  So it is as accurate as your system timer, plus
minor skew within a jiffy period.

The existing calibration routines actually use the same oscilator and a
similar algorithm, except calibration is done in an "amortized" fashion.  It
will suffer the same within-jiffy skew caused by irregular osilator.

The existing code calibrates over a longer time.  So potentially it can be
more accurate.  On the other hand, the calibration routine takes a longer
time, which affects the accuracy the other way.

My current patch uses 20 jiffy cycles as the calibration period.  On ddb5476
board, the result is off by 1/100,000, which should well preserve the 1us
resolution.

It would be interesting to see the actual result from existing calibrations. 
In any case, the skews are probably so small that it won't be an issue here.

Jun

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