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Re: i8259.c in big endian

To: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
Subject: Re: i8259.c in big endian
From: James Simmons <jsimmons@transvirtual.com>
Date: Thu, 8 Nov 2001 09:45:02 -0800 (PST)
Cc: linux-mips@oss.sgi.com, ralf@oss.sgi.com, linux-mips-kernel@lists.sourceforge.net
In-reply-to: <20011108.154702.74756496.nemoto@toshiba-tops.co.jp>
Sender: owner-linux-mips@oss.sgi.com
Also I like to see away to pass in a base offset. I have a mips device
which has a i8259 chip but its io is offseted by 0xb0000000.

On Thu, 8 Nov 2001, Atsushi Nemoto wrote:

> arch/mips/kernel/i8259.c seems not working in big endian.
> 
> Here is a patch to fix this.
> 
> --- linux-sgi-cvs/arch/mips/kernel/i8259.c    Mon Sep 10 02:43:01 2001
> +++ linux.new/arch/mips/kernel/i8259.c        Thu Nov  8 15:40:03 2001
> @@ -70,8 +70,13 @@
>  static unsigned int cached_irq_mask = 0xffff;
>  
>  #define __byte(x,y)  (((unsigned char *)&(y))[x])
> +#ifdef __BIG_ENDIAN
> +#define cached_21    (__byte(1,cached_irq_mask))
> +#define cached_A1    (__byte(0,cached_irq_mask))
> +#else
>  #define cached_21    (__byte(0,cached_irq_mask))
>  #define cached_A1    (__byte(1,cached_irq_mask))
> +#endif
>  
>  void disable_8259A_irq(unsigned int irq)
>  {
> ---
> Atsushi Nemoto
> 


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