| To: | ralf@oss.sgi.com |
|---|---|
| Subject: | Re: Toshiba TX3927 board boot problem. |
| From: | Atsushi Nemoto <nemoto@toshiba-tops.co.jp> |
| Date: | Wed, 31 Oct 2001 11:58:56 +0900 (JST) |
| Cc: | carstenl@mips.com, ahennessy@mvista.com, ajob4me@21cn.com, linux-mips@oss.sgi.com |
| In-reply-to: | <20011030155533.A28550@dea.linux-mips.net> |
| Organization: | TOSHIBA Personal Computer System Corporation |
| References: | <3BDDF193.B6405A7F@mvista.com> <3BDE62B4.BE7A1885@mips.com> <20011030155533.A28550@dea.linux-mips.net> |
| Sender: | owner-linux-mips@oss.sgi.com |
>>>>> On Tue, 30 Oct 2001 15:55:33 +0100, Ralf Baechle <ralf@oss.sgi.com> said:
ralf> So here is a preliminiary version of my patch. Still untested
ralf> and needs to be applied to mips64 also.
Thank you. This patch works fine for me.
One request: with this patch, a ptrace call for FPC_EIR returns error
on FPU-less CPUs. The call can be handled without error (as for other
FP registers).
--- /tmp/ptrace.c Wed Oct 31 11:44:16 2001
+++ arch/mips/kernel/ptrace.c Wed Oct 31 11:46:10 2001
@@ -174,8 +174,7 @@
unsigned int flags;
if (!(mips_cpu.options & MIPS_CPU_FPU)) {
- res = -EIO;
- goto out;
+ break;
}
__save_flags(flags);
---
Atsushi Nemoto
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