Re: Toshiba TX3927 board boot problem.

[Carsten Langgaard <carstenl@mips.com>]

Ralf Baechle wrote:

> On Tue, Oct 30, 2001 at 09:36:01AM +0100, Carsten Langgaard wrote:
>
> > > So,  we should not set CU1 generically for FPU-less CPUs especially since 
> > > a
> > > known problem exists
> > > for the tx3927?  Ie, qualify all setting of CU1 as follows:
> > >
> > > if (mips_cpu.options & MIPS_CPU_FPU)
> > >                    set_cp0_status(ST0_CU1);
> >
> > And while we are at it, could we handle the CP0 hazard of 4 nops, between
> > setting the CU1 bit in the status register and executing
> > the first floating point instruction, on CPU which got a FPU.
>
> Which CPUs actually need four nops?
>
> Just working on a patch; I found a bunch more place where we were playing
> with the CU1 bit.

The MIPS32 spec specify 4 nops.

>
>   Ralf

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com