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Re: Malta probs

To: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
Subject: Re: Malta probs
From: Ralf Baechle <ralf@oss.sgi.com>
Date: Thu, 25 Oct 2001 01:13:17 +0200
Cc: pmanolov@Lnxw.COM, linux-mips@oss.sgi.com
In-reply-to: <20011024.220729.39150004.nemoto@toshiba-tops.co.jp>; from nemoto@toshiba-tops.co.jp on Wed, Oct 24, 2001 at 10:07:29PM +0900
References: <20011023224718.A6283@dea.linux-mips.net> <3BD5E193.BB41A907@lnxw.com> <20011024024308.A21460@dea.linux-mips.net> <20011024.220729.39150004.nemoto@toshiba-tops.co.jp>
Sender: owner-linux-mips@oss.sgi.com
User-agent: Mutt/1.2.5i
On Wed, Oct 24, 2001 at 10:07:29PM +0900, Atsushi Nemoto wrote:

> ralf> just restructured in a way that allows adding of new CPU types
> ralf> and - even more important - get the code maintainable again.  As
> ralf> it is right now
> 
> In current CVS, All handle_xxx exception handler seems to be complied
> with ".set mips3".  Here is a patch.  I think this patch solves the
> problem reported by Petko.

Correct.  In addition there were also assembler options hardwired in
arch/mips/kernel/Makefile which never should have made it there.

  Ralf

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