linux-mips
[Top] [All Lists]

Re: Malta probs

To: "Ralf Baechle" <ralf@oss.sgi.com>, "Petko Manolov" <pmanolov@lnxw.com>
Subject: Re: Malta probs
From: "Kevin D. Kissell" <kevink@mips.com>
Date: Wed, 24 Oct 2001 18:47:10 +0200
Cc: <linux-mips@oss.sgi.com>
References: <200110230102.f9N12kb20443@oss.sgi.com> <3BD5D236.8D0CE33C@lnxw.com> <20011023224718.A6283@dea.linux-mips.net>
Sender: owner-linux-mips@oss.sgi.com
A clue - a machine check exception results
when there are two identical values in the
TLB, which is unhealthy for associative RAM
arrays (never mind that synthesized MIPS
4K and 5K cores may or may not actually
have associative RAM for the TLB).  In the
4K cores, this condition results even if the
two identical values are non-Valid, which was
not true in the R4000 and R5000 CPUs, and
which necessitated a tweak to the TLB flush
and invaldate routines to ensure that each entry
is written with a unique invalid value (a function
of the index).

Please double-check that the TLB flush
code that you are using does this.

            Kevin K.

----- Original Message ----- 
From: "Ralf Baechle" <ralf@oss.sgi.com>
To: "Petko Manolov" <pmanolov@lnxw.com>
Cc: <linux-mips@oss.sgi.com>
Sent: Tuesday, October 23, 2001 10:47 PM
Subject: Malta probs


> On Tue, Oct 23, 2001 at 01:25:26PM -0700, Petko Manolov wrote:
> 
> > The theory looks good, but in reality latest kernel crashes
> > with machine check exception in local_flush_tlb_all on malta
> > board.  I tried both egcs-1.1.2 and gcc-3.0.1 and both are
> > crashing at the same place.
> 
> What CPU are you using; can you send me your .config file?
> 
>   Ralf
> 


<Prev in Thread] Current Thread [Next in Thread>