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Re: Malta probs

To: Petko Manolov <pmanolov@Lnxw.COM>
Subject: Re: Malta probs
From: Ralf Baechle <ralf@oss.sgi.com>
Date: Wed, 24 Oct 2001 02:43:08 +0200
Cc: linux-mips@oss.sgi.com
In-reply-to: <3BD5E193.BB41A907@lnxw.com>; from pmanolov@Lnxw.COM on Tue, Oct 23, 2001 at 02:30:59PM -0700
References: <200110230102.f9N12kb20443@oss.sgi.com> <3BD5D236.8D0CE33C@lnxw.com> <20011023224718.A6283@dea.linux-mips.net> <3BD5E193.BB41A907@lnxw.com>
Sender: owner-linux-mips@oss.sgi.com
User-agent: Mutt/1.2.5i
On Tue, Oct 23, 2001 at 02:30:59PM -0700, Petko Manolov wrote:

> > What CPU are you using; can you send me your .config file?
> 
> I am using R4Kc core on Malta board; here is the .config file.
> 
> BTW the kernel silently hang after executing execve("/sbin/init")
> in init/main.c file. I suspect some of the tlb handling code
> which was recently changed is causing the crash. Not having any
> register dump also increase the entropy :-)

It wasn't really changed, the whole lump of arch/mips/mm/ was just
restructured in a way that allows adding of new CPU types and - even
more important - get the code maintainable again.  As it is right now
we had a bunch of almost identical copies of the TLB flushing code,
some even buggy.  Now way I'd continue to deal with that.  So now let's
fix the breakage asap.  As there were no functional changes any bugs
are of rather trivial nature.

  Ralf

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