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NON FPU cpus (again)

To: linux-mips@oss.sgi.com
Subject: NON FPU cpus (again)
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
Date: Thu, 20 Sep 2001 12:13:16 +0900 (JST)
Cc: ralf@oss.sgi.com
In-reply-to: <20010207144857.B24485@paradigm.rfc822.org>
Organization: TOSHIBA Personal Computer System Corporation
Sender: owner-linux-mips@oss.sgi.com
On 7 Feb 2001, Florian Lohoff reported exit_thread() problem on
NON-FPU CPUs.  Tt is still not solved in the current kernel.

>>>>> On Wed, 7 Feb 2001 14:48:58 +0100, Florian Lohoff <flo@rfc822.org> said:
flo> I stumbled over the current tree as on the 3912 we dont have a
flo> FPU so we cant use the default "exit_thread" which simply causes
flo> the CPU to halt (not even an cpu reset works)

Following codes in exit_thread() and flush_thread() should be executed
only if (mips_cpu.options & MIPS_CPU_FPU) == 0, shouldn't it?

                set_cp0_status(ST0_CU1);
                __asm__ __volatile__("cfc1\t$0,$31");

BTW, I can not see any point in copying FCR31 to r0.  What is a
purpose of the cfc1 instruction?

---
Atsushi Nemoto

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