linux-mips
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Re: set_except_vector question

To: "Bradley D. LaRonde" <brad@ltc.com>
Subject: Re: set_except_vector question
From: Lars Munch <lars@segv.dk>
Date: Sat, 1 Sep 2001 18:10:09 +0200
Cc: linux-mips@oss.sgi.com
In-reply-to: <010401c132fe$610d0610$3501010a@ltc.com>; from brad@ltc.com on Sat, Sep 01, 2001 at 11:54:26AM -0400
References: <20010901165842.B13357@tuxedo.skovlyporten.dk> <010401c132fe$610d0610$3501010a@ltc.com>
Sender: owner-linux-mips@oss.sgi.com
User-agent: Mutt/1.2.5i
What do you mean by "synthesizing a jump"?

My CPU is a 5Kc and it has a DIVEC which is set to the mipsIRQ function in
/arch/mips64/mips-boards/generic/mipsIRQ.S to handle interrupts. But I still do
not understand the address manipulation which is done before storing the
function pointer (handler).

Thanks
Lars Munch

On Sat, Sep 01, 2001 at 11:54:26AM -0400, Bradley D. LaRonde wrote:
> Looks like it is synthesizing a jump (j) instruction to forward interrupt
> exceptions to the interrupt handler for cpus that have a dedicated interrupt
> vector (DIVEC).  arch/mips/kernel/setup.c sets the DIVEC option for certain
> cpus.
> 
> Regards,
> Brad
> 
> ----- Original Message -----
> From: "Lars Munch" <lars@segv.dk>
> To: <linux-mips@oss.sgi.com>
> Sent: Saturday, September 01, 2001 10:58 AM
> Subject: set_except_vector question
> 
> 
> > Hi
> >
> > I have been looking at the set_except_vector function in
> > arch/mips[64]/kernel/traps.c and wondering why the handler
> > address is changed/recalculated before it is stored:
> >
> > *(volatile u32 *)(KSEG0+0x200) = 0x08000000 | (0x03ffffff & (handler >>
> 2));
> >
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> >
> > Could someone please enlighten me?
> >
> > Thanks
> > Lars Munch
> >
> 

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