Looks like it is synthesizing a jump (j) instruction to forward interrupt
exceptions to the interrupt handler for cpus that have a dedicated interrupt
vector (DIVEC). arch/mips/kernel/setup.c sets the DIVEC option for certain
cpus.
Regards,
Brad
----- Original Message -----
From: "Lars Munch" <lars@segv.dk>
To: <linux-mips@oss.sgi.com>
Sent: Saturday, September 01, 2001 10:58 AM
Subject: set_except_vector question
> Hi
>
> I have been looking at the set_except_vector function in
> arch/mips[64]/kernel/traps.c and wondering why the handler
> address is changed/recalculated before it is stored:
>
> *(volatile u32 *)(KSEG0+0x200) = 0x08000000 | (0x03ffffff & (handler >>
2));
>
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> Could someone please enlighten me?
>
> Thanks
> Lars Munch
>
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