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Re: r4600 flag

To: Ralf Baechle <ralf@oss.sgi.com>
Subject: Re: r4600 flag
From: Carsten Langgaard <carstenl@mips.com>
Date: Tue, 31 Jul 2001 15:38:46 +0200
Cc: Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>, linux-mips@oss.sgi.com
Organization: MIPS Technologies
References: <3B664857.4040100@pacbell.net> <20010731092822.L27008@rembrandt.csv.ica.uni-stuttgart.de> <20010731112530.A12409@bacchus.dhis.org>
Sender: owner-linux-mips@oss.sgi.com

Ralf Baechle wrote:

> On Tue, Jul 31, 2001 at 09:28:22AM +0200, Thiemo Seufer wrote:
>
> > > The la macro is split into a lui and a daddiu. The daddiu is not correct
> > > for a mips32 cpu. Getting rid of the -mcpu=4600 fixes the problem and
> > > the daddiu is then changed addiu.
> >
> > This is IIRC a known bug in at least current binutils CVS, a patch
> > to fix it really was already discussed.
>
> Is this macro expaned by the compiler or assembler?  Just -mcpu=r4600
> should not make cc1 generate any instructions beyond MIPS I.
>
> In the past we already had inline assembler fragments that left the assembler
> in .misp3 mode thus resulting the rest of the file bein assembled in
> mips3 mode.

Yes, and I'm sure I fixed that so it worked on MIPS32 CPUs, only leaving the
"eret" instructions.

>
> > > Is there a truly correct -mcpu option for a mips32 cpu?
>
> None is really good, none is really bad ...
>
> > In theory, no -mcpu option (which is to be deprecated in
> > favor of -march/-mtune) and -mips32 as ISA flag _should_ work.
> >
> > In practice, the patch which adds this to gas was discussed on the
> > binutils list the last days and is likely to go in CVS
> > today or tomorrow.
>
>   Ralf


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