On Tue, Jul 17, 2001 at 03:20:55AM +0200, Ralf Baechle wrote:
> On Mon, Jul 16, 2001 at 04:37:12PM -0400, Greg Johnson wrote:
>
> > I also have another indy with a 175MHz r4400. This machine seems to
> > work fine even without the fast-sysmips patch.
>
> This could be explained if you have different libraries, the one compiled for
> MIPS II, the other one only for MIPS I on these two systems. Sure you're
> running the very same binaries?
They're the same.
> Depends. The older R4000s were really buggy silicon and we don't
> have all the workarounds needed to keep them happy. So in theory if
> circumstances are just right that can explain why you have so much
> fun with the R4000 machine.
Interesting.
> When the kernel is booting it prints a a line "CPU revision is: xxx"
> where xxx is a 8 digit hex number. What number?
For the r4000 indy:
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4000 FPU<MIPS-R4000FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000422
Primary instruction cache 8kb, linesize 16 bytes.
Primary data cache 8kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
For the r4400 indy:
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
Thanks,
Greg
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