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CONFIG_MIPS_UNCACHED

To: linux-mips@oss.sgi.com
Subject: CONFIG_MIPS_UNCACHED
From: Jun Sun <jsun@mvista.com>
Date: Sat, 23 Jun 2001 09:05:15 -0700
Sender: owner-linux-mips@oss.sgi.com
I looked at the code and it appears this config may not work properly.

My understanding is that if CPU has been running with cache enabled, and,
presummably, have many dirty cache entries, and if you suddenly change config
register to run kernel uncached, you *don't* get all the dirty cache lines
flushed into memory.  Therefore, you will be accessing stale data in memory.

Is this right?  If so, we need a better way to run CPU uncached.

In the past, I have been a private patch to do so.  It seems pretty difficult
to come up a generic, because we want to figure out the CPU type and disable
cache *before* kernel starts to modify any memory content.

BTW, this comes to me as I observe some weired behavior when I try to run
uncached.

Jun

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