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Re: MIPS_ATOMIC_SET again (Re: newest kernel

To: "Joe deBlaquiere" <jadb@redhat.com>, "Mike McDonald" <mikemac@mikemac.com>
Subject: Re: MIPS_ATOMIC_SET again (Re: newest kernel
From: "Kevin D. Kissell" <kevink@mips.com>
Date: Wed, 30 May 2001 09:09:50 +0200
Cc: <linux-mips@oss.sgi.com>
References: <200105291545.IAA13454@saturn.mikemac.com>
Sender: owner-linux-mips@oss.sgi.com
> >>>>  Are vr41xx plain ISA I or crippled ISA II+ CPUs?
> >>>
> >>> Actually, they are crippled MIPS III+ 64-bit CPUs
> >>
> >>
> >>  Then an ll/sc and lld/scd emulation seems to be most appropriate here.
I
> >> don't think we want to add _test_and_set() to mips64*-linux.
> >
> >All the cases I've seen have been for 32-bit kernels. A 64-bit PDA kernel
seems like a wee tiny bit of overkill
>
>   I've been asked about running 64 bit binaries on a VR4121.

Being able to use all 64-bits of the registers is a huge win for
certain embedded/handheld applications, even if 64-bit addressing
is worse than useless.  It's unfortunate that the original R4000 merged
the enabling of 64-bit data types with the generation of 64-bit addresses.
The newer MIPS64 CPUs have a bit in the Status register to
enable the data types without enabling the addresses.
I don't know that NEC has implemented this for the VR41xx
family, but they really should.  And fix ll/sc while they are at it.  ;-)

            Kevin K.


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