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Re: address translation with TLB

To: Tom Appermont <tea@sonycom.com>
Subject: Re: address translation with TLB
From: Ralf Baechle <ralf@oss.sgi.com>
Date: Tue, 17 Apr 2001 14:11:22 -0300
Cc: linux-mips@oss.sgi.com
In-reply-to: <20010414102901.A13595@ginger.sonytel.be>; from tea@sonycom.com on Sat, Apr 14, 2001 at 10:29:01AM +0200
References: <20010414102901.A13595@ginger.sonytel.be>
Sender: owner-linux-mips@oss.sgi.com
User-agent: Mutt/1.2.5i
On Sat, Apr 14, 2001 at 10:29:01AM +0200, Tom Appermont wrote:

> What are the things to do to use the TLB for access to otherwize
> unreachable PCI memory or IO areas? I have used the function
> add_wired_entry to add an entry to the TLB, modified the 
> functions virt_to_phys, phys_to_virt, virt_to_bus, bus_to_virt,
> and ioremap to do the translations I want, but I wonder if there
> are other things to do to get this working.

add_wired_entry is almost certainly the wrong thing to do.  It's only
recommended if you must address peripherals at physical addresses of
>= 0x100000000, that is on 64-bit machines.  32-bit addresses can
be represented in our pagetables.

> Even more so, because none of the mips boards currently in the tree seem
> to need TLB remapping.

Sane designs make sure that peripherals are at physical addresses of 512mb
or less so can be addressed through KSEG1 without using TLB entries.  So
far the only violation of this rule are the Jazz systems.

  Ralf

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